Memory devices are electronic devices arranged to store electrical signals. For example, a basic memory element may be a fuse that can either be open or be closed. Open and closed states of the fuse may be used to designate one bit of information corresponding to a value of 1 or 0. A plurality of memory elements can be combined in various arrangements in order to store multiple bits arranged in words or other combinations. Various electronic circuits including semiconductor devices such as transistors are used as memory elements.
Memory elements may be classified in two main categories: volatile and nonvolatile. Volatile memory loses any data as soon as the system is turned off. Thus, it requires constant power to remain viable. Most types of random access memory (RAM) fall into this category. Non-volatile memory does not lose its data when the system or device is turned off. An NVM device may be implemented as a MOS transistor that has a source, a drain, an access or a control gate, and a floating gate. It is structurally different from a standard MOSFET in its floating gate, which is electrically isolated, or “floating”.
A range of considerations including a purpose of the device, power consumption, size, retention capacity and duration may influence design of non-volatile memory devices. For example, some NVM devices may be categorized as floating gate or charge-trapping from a programming perspective.
In floating gate memory circuits, electrons are typically transferred from the floating gate to the substrate or from the substrate to the floating gate by bi-directional tunneling through a thin silicon dioxide (SiO2) layer. Tunneling is the process by which an NVM device can be either erased or programmed and is usually dominant in thin oxides of thicknesses less than 12 nm. Storage of the charge on the floating gate allows the threshold voltage to be electrically altered between a low and a high value to represent logic 0 and 1, respectively. Other types of electron injection methods such as hot electron injection may also be employed in floating gate devices. In floating gate memory devices, charge or data is stored in the floating gate and is retained when the power is removed.
In charge-trapping memory devices, charge or data is stored in the discrete nitride traps and is also retained when the power is removed. Charge-trapping devices are typically used in MNOS (Metal Nitride Oxide Silicon), SNOS (Silicon Nitride Oxide Semiconductor), and SONOS (Silicon Oxide Nitride Oxide Semiconductor) technologies. The charges in MNOS memories may be injected from the channel region into the nitride by quantum mechanical tunneling through an ultra-thin oxide (UTO).
Non-volatile memory devices may also be implemented as NVM arrays that include a plurality of NVM cells arranged in rows and columns. In general, single-transistor n-channel NVM cells operate as follows. During an erase operation, electrons are removed from a floating gate of the NVM cell, thereby lowering the threshold voltage of the NVM cell. During a program operation, electrons are inserted into the floating gate of the NVM cell, thereby raising the threshold voltage of the NVM cell. Thus, during program and erase operations, the threshold voltages of selected NVM cells are changed. During a read operation, read voltages are applied to selected NVM cells. In response, read currents flow through these selected NVM cells.